Fpga-based Fir Filters Using Digit-serial Arithmetic
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چکیده
This paper describes the use of digit-serial arithmetic for compact and eecient implementations of real-time DSP applications on eld programmable gate arrays (FPGAs). As an example, the implementation of a digit-serial 5-tap FIR lter on a Xilinx XC4010 FPGA is considered. An analysis of the performance comparison of several FIR lters is described. The results show that digit-serial designs with a digit-size of 2 bits have about 17% smaller area-time product than those of a bit-serial implementations.
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تاریخ انتشار 1997